TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 184

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
PFCR
PFFC
SC0MOD0
SC0CR
BR0CR
INTES0
SC0BUF
(2) Mode 1 (7-bit UART mode)
(3) Mode 2 (8-bit UART mode)
X: Don't care, −: No change
SC0MOD0<SM1:0> field to 01.
the setting of the serial channel control register SC0CR<PE> bit; whether even parity
or odd parity will be used is determined by the SC0CR<EVEN> setting when
SC0CR<PE> is set to 1 (enabled).
parity bit can be added (use of a parity bit is enabled or disabled by the setting of
SC0CR<PE>); whether even parity or odd parity will be used is determined by the
SC0CR<EVEN> setting when SC0CR<PE> is set to 1 (enabled).
Setting example:
Setting example:
7-bit UART mode is selected by setting the serial channel mode register
In this mode a parity bit can be added. Use of a parity bit is enabled or disabled by
8-bit UART mode is selected by setting SC0MOD0<SM1:0> to 10. In this mode a
Start
Start
← X
← −
← −
← −
← 0
← X
← *
7
Bit0
Bit0
6
X
X
0
1
0
1
*
Transmission direction (Transmission rate: 2400 bps at f
5
X
X
1
1
0
*
Transmission direction (Transmission rate: 9600 bps at f
1
1
4
X
X
0
0
*
When transmitting data of the following format, the control
registers should be set as described below.
When receiving data of the following format, the control
registers should be set as described below.
3
X
X
0
1
*
2
2
*Clock condition: Clock gear 1/1(fc)
2
1
0
*
92CH21-182
1
0
0
0
*
3
3
0
1
1
1
0
0
*
4
4
Set PF0 to function as the TXD0 pin.
Select 7-bit UART mode.
Add even parity.
Set the transfer rate to 2400 bps.
Enable the INTTX0 interrupt and set it to interrupt level 4.
Set data for transmission.
5
5
6
6
parity
Even
7
Stop
parity
Odd
C
= 39.3216 MHz)
C
= 39.3216 MHz)
Stop
TMP92CH21
2009-06-19

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