TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 485

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
LCP0 clock period ( = tm)
LCP0 high width
LCP0 low width
Data valid → LCP0 falling
LCP0 falling → Data hold
4.3.7
LD0 to LD11
Parameter
LCD Controller (SR mode)
LCP0
t
CWH
LD0 to LD11 output
t
DSU
Symbol
t
CW
t
t
t
t
t
CWH
CWL
DHD
t
DSU
CW
DHD
t
CWL
0.5 tm − 12
0.5 tm − 12
0.5 tm − 20
92CH21-483
0.5 tm − 5
Min
2 T
Variable
Max
40 MHz 36 MHz 27 MHz Unit
100
38
38
30
45
43.5
43.5
35.5
50.5
111
TMP92CH21
148
2009-06-19
62
62
54
69
ns

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