TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 144

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

X: Don't care, −: No change
TA01RUN
TA01MOD
TA0REG
TA1REG
TA1FFCR
PCCR
PCFC
TA01RUN
Example: To generate 1/4 duty 62.5 kHz pulses (at f
Calculate the value which should be set in the timer register.
To obtain a frequency of 62.5 kHz, the pulse cycle t should be: t = 1/62.5 kHz = 16 μs
φT1 (=(16/fc)s (at f
Therefore set TA1REG to 40 (28H)
The duty is to be set to 1/4: t × 1/4 = 16 μs × 1/4 = 4 μs
Therefore, set TA0REG = 10 = 0AH.
16 μs ÷ (16/fc)s = 40
4 μs ÷ (16/fc)s = 10
← 0
← 1
← 0
← 0
← X
← −
← −
← 1
7
16 μs
6
X
0
0
0
X
−
−
X
C
5
X
X
0
1
X
−
−
X
= 40 MHz);
4
X
X
0
0
X
−
−
X
3
−
X
1
1
0
−
−
−
2
0
X
0
0
1
−
−
1
92CH21-142
1
0
0
1
0
1
−
−
1
0
0
1
0
0
X
1
1
1
Stop TMRA0 and TMRA1 and clear it to “0”.
Set the 8-bit PPG mode, and select φT1 as input clock.
Write 0AH.
Write 28H.
Set TA1FF, enabling both inversion and the double buffer.
10 generates a negative logic pulse.
Set PC0 as the TA1OUT pin.
Start TMRA0 and TMRA1 counting.
C
= 40 MHz)
TMP92CH21
2009-06-19