TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 187

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
Setting example:
Main
PFCR
PFFC
INTES0
SC0MOD0
SC0BUF
INTTX0 interrupt
SC0MOD0
SC0BUF
Main
PFCR
PFFC
PFFC2
INTES0
SC0MOD0
INTRX0 interrupt
A
if A
Then SC0MOD0
CC
CC
= select code
TXD
Setting the slave controller
Master
Setting the master controller
← X
← −
← 1
← 1
← 0
← 0
← *
← X X X X X − 0 1
← −
← X X X X X X X 1
← 1
← 1
To link two slave controllers serially with the master controller using the
internal clock f
SC0BUF
− − − 0 − − − −
RXD
X X X X − 0 1
1 0 1 1 1 1 0
0 1 1 1 1 1 0
X X X X − 0 1
X X X X − 0 1
1 0 0 1 1 0 1
0 1 0 1 1 1 0
0 0 0 0 0 0 1
− − − − − − −
* * *
* *
IO
92CH21-185
as the transfer clock.
* *
TXD
Select code
00000001
Slave1
Set PF0 and PF1 to function as the TXD0 and RXD0 pins
respectively.
Enable the INTTX0 interrupt and set it to interrupt level 4.
Enable the INTRX0 interrupt and set it to interrupt level 5.
Set f
Set the select code for slave controller 1.
Set TB8 to 0.
Set data for transmission.
Select PF1 and PF0 to function as the RXD0 and TXD0 pins
respectively (Open-drain output).
Enable INTRX0 and INTTX0.
Set <WU> to 1 in 9-bit UART transmission mode using f
the transfer clock.
Clear <WU> to 0
RXD
IO
as the transmission clock for 9-bit UART mode.
Select code 00001010
TXD
Slave 2
RXD
TMP92CH21
2009-06-19
SYS
as

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