TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 194

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

3.10.1.1 System Configuration
1.
2.
3.
PWM
DPLL
SIE
Descriptor RAM
The USB controller (UDC) consists of the following 3 blocks.
900/H1 CPU I/F (details given in Section 3.10.2, below).
UDC core block (DPLL, SIE, IFM and PWM), request controller, descriptor RAM
and 4 endpoint FIFO (details given in Section 3.10.3, below).
USB transceiver
384 bytes
UDC core
IFM
I/F
manager
FIFO
Figure 3.10.1 UDC Block Diagram
Request controller
92CH21-192
UDC
FIFO (64 bytes × 1)
FIFO (64 bytes × 2)
FIFO (64 bytes × 2)
FIFO (8 bytes × 1)
Endpoint 0:
Endpoint 1:
Endpoint 2:
Endpoint 3:
900/H1 CPU
interface
transceiver
USB
TMP92CH21
2009-06-19
ADDRESS
WR
RD
D+
D−