TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 172

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

Note:
(12) Timing generation
1.
2.
In 9-bit and 8-bit + parity modes, interrupts coincide with the ninth bit pulse.
Thus, when servicing the interrupt, it is necessary to wait for a 1-bit period (to allow the stop bit to be
transferred) to allow checking for a framing error.
Receiving
Transmitting
Interrupt Timing
Framing Error Timing
Parity Error Timing
Overrun Error Timing
Interrupt Timing
Transmission
Interrupt
Timing
Receiving
Interrupt
Timing
In UART mode
I/O interface
SCLK output mode
SCLK input mode
SCLK output mode
SCLK input mode
Mode
Mode
Center of last bit
Center of stop bit
Center of last bit
Just before stop bit is
transmitted
(bit8)
(bit8)
92CH21-170
(Note)
9 Bits
9 Bits
−
Immediately after last bit data.
(See Figure 3.9.19.)
Immediately after rise of last SCLK signal rising mode, or
immediately after fall in falling mode. (See Figure 3.9.20.)
Timing used to transfer received to data receive buffer 2 (SC0BUF)
(e.g. immediately after last SCLK). (See Figure 3.9.21.)
Timing used to transfer received data to receive buffer 2 (SC0BUF)
(e.g. immediately after last SCLK). (See Figure 3.9.22.)
8 Bits + Parity (Note)
Center of last bit
Center of stop bit
Center of last bit
Center of last bit
Just before stop bit is
transmitted
(parity bit)
(parity bit)
(parity bit)
8 Bits + Parity
Center of stop bit
Center of stop bit
Center of stop bit
Center of stop bit
Just before stop bit is
transmitted
8 Bits, 7 Bits + Parity,
8 Bits, 7 Bits + Parity,
7 Bits
7 Bits
TMP92CH21
2009-06-19