TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 502

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
Symbol
PFFC2
PACR
PCCR
PAFC
PCFC
PFCR
PFFC
(1) I/O ports (4/7)
register2
function
function
function
function
Name
register
register
register
register
register
register
control
control
control
Port A
Port A
Port C
Port C
Port F
Port F
Port F
Address
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
002AH
002BH
003EH
003DH
0032H
0033H
003FH
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
0: Input
1: Output
1: SDCKE
0: Port
1: CSZF ,
0: Port
CSZF
LCP1
LCP1
PC7C
PA7F
PC7F
PF7F
port,
port,
W
7
0
0
0
1
W
W
0: 3states
0: Input
1: Output
1: KO8,
KO8
PA6C
PC6C
PA6F
LDIV
PC6F
LDIV
0
port,
port,
6
0
0
0
0: Input port or key-in
1: LD11 to LD8 output
92CH21-500
PA5C
PA5F
0: Key-in disable
0
5
0
W
PA4C
PA4F
0
4
0
W
0: Input
1: Output
0: Port
1: INT3
PA3C
PC3C
PA3F
PC3F
INT3
1: Key-in enable
0
port,
3
0
0
0
port
0: Input
1: Output
TB0OUT0
0: Port
1: INT2,
TB0OUT0
0: Input
1: Output
0: Port,
1: SCLK0,
INT2
PC2C
SCLK0
SCLK1
PA2F
SCLK1,
SCLK0,
SCLK1,
SCLK0,
PC2F
PF2C
PF2F
CTS ,
CTS
CTS ,
CTS
port,
port,
port,
2
0
0
0
0
0
port,
1
0
1
0
W
W
1: Output
0: Input
0: Port
1: INT1,
TA3OUT
0: Input
1: Output
Select
RXD0 pin
0: Port F1
1: Port 91
TA3OUT
PC1C
PA1F
INT1
PC1F
PF1C
PF1F
RXD0,
RXD1,
W
port,
port,
W
1
0
0
0
0
0
port,
port
TMP92CH21
2009-06-19
1: Output
0: Input
port,
TXD1
Output
buffer
0: CMOS
1:
Open-drain
0: Input
0: Port
1: INT0,
1: Output
0: Port
1: TXD1,
TA1OUT
TA1OUT
INT0
PF0F2
PC0C
PA0F
TXD0
PC0F
PF0C
PF0F
TXD0
port,
port,
W
0
0
0
0
0
0
0
port,

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