TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 425

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
TB0RG0H/L-
WR
φT16
φT1
φT4
X: Don't care, −: No change
TB0RUN
TB0RUN
TB0FFCR
TB0MOD
TB0RUN
TB0RG0H/L
TB0RG1H/L
PCCR
PCFC
TB0RUN<TB0RDE>
The following block diagram illustrates this mode.
The following example shows how to set 16-bit PPG output mode:
Selector
Selector
← 0
← 1
← 1
← 0
← −
← −
← 1
7
*
*
*
*
Figure 3.18.8 Block Diagram of 16-Bit Mode
1
1
6
0
*
*
*
*
0
1
0
0
Register buffer 10
16-bit comparator
X
X
X
X
X
5
*
*
0
1
*
*
TB0RG0H/L
X
X
X
X
X
4
*
*
*
*
0
0
(** = 01, 10, 11)
3
*
*
*
*
1
0
2
0
0
1
1
1
*
*
*
*
92CH21-423
X
X
X
1
*
*
*
*
1
*
16-bit up counter
Internal data bus
0
0
*
*
*
*
0
0
*
1
Match
UC10
Disable the TB0RG0H/L double buffer and stop TMRB0.
Set the duty ratio (16 bits).
Set the frequency (16 bits).
Enable the TB0RG0H/L double buffer.
(The duty and frequency are changed on an INTTB01 interrupt.)
Set the mode to invert TB0FF0 at the match with
TB0RG0H/L/TB0RG1H/L. Set TB0FF0 to 0.
Select the Prescaler output clock as the input clock and disable
the capture function.
Set PC6 to function as TB0OUT0.
Start TMRB0.
16-bit comparator
TB0RG1H/L
TB0RUN<TB0RUN> TB0OUT0 (PPG output)
Clear
(TB0FF0)
F/F
TMP92CH21
2009-06-19

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