TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 169

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

Timing of writing to the
transmission buffer
Note 1: If the
Note 2: Transmission starts on the first falling edge of the TXDCLK clock after the
TXDCLK
CTS0
SIOCLK
TXD
transmission.
Handshake function
errors can be avoided. The handshake function is enabled or disabled by the
SC0MOD<CTSE> setting.
transmission is halted until the
interrupt is generated, and it requests the next data send from the CPU. The next
data is written in the transmission buffer and data sending is halted.
setting any port assigned to be the
“high” to request send data halt after data receive is completed by software in the
RXD interrupt routine.
(1)
Use of
When the
Though there is no
CTS0
Send is suspended
from (1) and (2)
TMP92CH21
signal goes high during transmission, no more data will be sent after completion of the current
Sender
CTS0
Figure 3.9.6
13
CTS0
Figure 3.9.5 Handshake Function
CTS0
TXD
pin allows data to be sent in units of one frame; thus, overrun
14
(2)
pin goes high on completion of the current data send, data
15
RTS
CTS0
92CH21-167
pin, a handshake function can be easily configured by
16
(Clear to send) Timing
CTS0
1
Start bit
2
RTS
pin goes low again. However, the INTTX0
RTS
RXD
3
function. The
TMP92CH21
Receiver
(Any port)
14
CTS0
15
RTS
signal has fallen.
16
should be output
1
TMP92CH21
2009-06-19
bit0
2
3