TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 390

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

SDUUDQM
SDULDQM
SDLUDQM
SDLLDQM
SDCAS
A15 to A0
SDRAS
SDWE
SDCS
SDCKE
SDCLK
A10
(4) SDRAM initialize
Precharge
627
introduction of power supply to SDRAM. The command is shown in Figure 3.16.6.
command execution) is halted.
made to enable the SDRAM control signals and address signals (A0 to A15).
automatically cleared to “000”.
All
This LSI can generate the following SDRAM initialize routine after
The above commands are issued by setting SDCMM<SCMM2:0> to “001”.
While these commands are issued, the CPU operation (an instruction fetch,
Before executing the initialization sequence, appropriate port settings must be
After the initialization sequence is completed, SDCMM<SCMM2:0> is
1. Precharge all commnad
2. Eight Auto Refresh commands
3. Mode Register set command
-refresh
Figure 3.16.6 Timing of Initialization command
Auto
-refresh
Auto
92CH21-388
Eight Auto Refresh commands
227
-refresh
Auto
-refresh
Auto
-refresh
Auto
TMP92CH21
2009-06-19
Mode Register
set