IPR-XAUIPCS Altera, IPR-XAUIPCS Datasheet - Page 51

• Manufacturer Part Number: IPR-XAUIPCS
• Description: IP CORE Renewal Of IP-XAUIPCS
• Manufacturer: Altera

Specifications of IPR-XAUIPCS

• Software Application: IP CORE, Interface And Protocols, ETHERNET
• Supported Families: Stratix IV GT, Stratix V
• Features: 10Gbase-R PHY IP Core, Xaui PHY IP Core, Memory-Mapped (Avalon-Mm) Interface
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Chapter 4: XAUI PHY IP Core
TimeQuest Timing Constraints
Synopsys Design Constraints for Clocks (continued)
#****** Use this section for Stratix V Soft XAUI ******
#create_generated_clock -name {xgmii_rx_clk_0} -source [get_pins -compatibility_mode
{*alt_pma_0|alt_pma_sv_inst|sv_xcvr_generic_inst|channel_tx[0].duplex_pcs|ch[0].tx_pcs
|clkout} ] -multiply_by 1 [get_ports {xgmii_rx_clk}]
# internal clocks
# There should be no direct (unsynchronized) paths from coreclkout to mgmt_clk
#****** Use this section for Stratix IV Soft XAUI ******
#set_clock_groups -asynchronous -group
{*alt_pma_0|alt_pma_tgx_inst|pma_direct|auto_generated|central_clk_div0|refclkout} -
group {phy_mgmt_clk}
#set_clock_groups -asynchronous -group
{*alt_pma_0|alt_pma_tgx_inst|pma_direct|auto_generated|receive_pma*|deserclock*} -group
{phy_mgmt_clk}
#set_clock_groups -asynchronous -group {refclk} -group {phy_mgmt_clk}
#****** Use this section for Stratix V Soft XAUI ******
#set_clock_groups -asynchronous -group
{*alt_pma_0|alt_pma_sv_inst|sv_xcvr_generic_inst|channel_rx*.rx_pma*|*} -group
{phy_mgmt_clk}
#set_clock_groups -asynchronous -group
{*alt_pma_0|alt_pma_sv_inst|sv_xcvr_generic_inst|channel_tx*.duplex_pcs|*} -group
{phy_mgmt_clk}
#set_clock_groups -asynchronous -group
{*alt_pma_0|alt_pma_sv_inst|sv_xcvr_generic_inst|channel_tx*.duplex_pcs|ch*.rx_pcs|clo
cktopld*} -group
{*alt_pma_0|alt_pma_sv_inst|sv_xcvr_generic_inst|channel_tx*.duplex_pcs|ch*.tx_pcs|clk
out}
#set_clock_groups -asynchronous -group {refclk} -group {phy_mgmt_clk}
December 2010 Altera Corporation
1
This .sdc file is only applicable to the XAUI IP core when compiled in isolation. You
can use it as a reference to help in creating your own .sdc file.
Altera Transceiver PHY IP Core User Guide
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