IPR-XAUIPCS Altera, IPR-XAUIPCS Datasheet - Page 16

• Manufacturer Part Number: IPR-XAUIPCS
• Description: IP CORE Renewal Of IP-XAUIPCS
• Manufacturer: Altera

Specifications of IPR-XAUIPCS

• Software Application: IP CORE, Interface And Protocols, ETHERNET
• Supported Families: Stratix IV GT, Stratix V
• Features: 10Gbase-R PHY IP Core, Xaui PHY IP Core, Memory-Mapped (Avalon-Mm) Interface
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

2–2
MegaWizard Plug-In Manager Flow
Altera Transceiver PHY IP Core User Guide
Specifying Parameters
■
Figure 2–2. Design Flows
The MegaWizard Plug-In Manager flow offers the following advantages:
■
■
The MegaWizard Plug-In Manager flow allows you to customize your IP core and
manually integrate the function into your design.
To specify IP core parameters with the MegaWizard Plug-In Manager, follow these
steps:
1. Create a Quartus II project using the New Project Wizard available from the File
2. In the Quartus II software, launch the MegaWizard Plug-in Manager from the
MegaWizard Plug-In Manager Flow
Allows you to parameterize an IP core variant and instantiate into an existing
design
For some IP cores, this flow generates a complete example design and testbench.
menu.
Tools menu, and follow the prompts in the MegaWizard Plug-In Manager
interface to create or edit a custom IP core variation.
Functional Simulation
Expected Results?
Simulation Give
Debug Design
Perform
Does
SOPC Builder
SOPC Builder System
Qsys or
Specify Parameters
Complete Qsys or
Flow
Yes
Optional
and Compile Design
Select Design Flow
Add Constraints
IP Complete
Specify Parameters
December 2010 Altera Corporation
MegaWizard Plug-In Manager Flow
MegaWizard
Flow
Chapter 2: Getting Started