tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 83

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Exceptions/Interrupts
(4) Preconfiguration 2 (interrupt from peripheral IP)
(5) Preconfiguration 3 (software set)
(6) Configuring the clock generator (standby factor only)
the IMCG register of the clock generator. The IMCG register is capable of configuring each factor.
unexpected interrupt. To clear corresponding interrupt request, write value corresponding to the interrupt to
be used to the ICRCG register. See “6.6.3.2 INTCG Clear Register” for each value.
The setting varies depending on the IP to be used. See chapters of relevant IP for details.
The software set interrupt is requested by setting the IMC register of INTC.
Set the active state to “L” level. You can set any interrupt level.
This factor is recognized upon setting the register. Set the active state and interrupt level as appropriate.
You can omit this step unless the interrupt is used to clear standby.
You need to configure active state and enabling interrupt for an interrupt to clear the standby mode with
Before enabling an interrupt, clear the corresponding interrupt request already held. This can avoid
(Note) n: register number
● Interrupt controller register
IMC19<EIM671:670>
IMC19<IL672:670>
● Clock generator register
IMCGn<EMCGm>
EICRCG<ICRCG>
IMCGn<INTmEN>
m: number assigned to interrupt factor
TMP19A44(rev1.3) 6-33
←
←
←
Active state
Value corresponding to the interrupt to be used
“1” (interrupt enabled)
←
←
“00” (“L” level)
Interrupt level
TMP19A44
2010-04-01