tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 240

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

2 waits automatically inserted + 2N (N=1)
3 waits automatically inserted + 2N (N=1)
2 waits automatically inserted + 2N (N=2)
2 waits automatically inserted
External Bus Interface
Fig. 8.6 shows the write operation timing when 0 wait, waits automatically inserted, and waits
automatically inserted + external waits are inserted in the separate bus mode.
0 wait
fsys
A[23:0]
D[15:0]
A[23:0]
D[15:0]
A[23:0]
D[15:0]
A[23:0]
D[15:0]
A[23:0]
D[15:0]
/WAIT
/WAIT
/WAIT
/WAIT
/WAIT
/WR
/WR
/WR
/WR
/WR
--- External wait sampling point
External wait sampling points take place before a cycle of waits automatically
inserted is finished and before a 2N_wait cycle is finished as shown above.
The same applies to combinations of other numbers of waits.
Fig. 8.6 Write Operation Timing Diagram
TMP19A44 (rev1.3) 8-12
2 waits automatically
automatically
automatically
tsys
3 waits automatically
inserted
inserted
2 waits
2 waits
inserted
inserted
2N_WAIT
2N_WAIT
2N_WAIT
TMP19A44
2010-04-01