tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 154

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

TMP19A44
7.3 Port 2 (P20 through P27)
The port 2 is a general-purpose, 8-bit input/output port. For this port, inputs and outputs can be specified in units
of bits by using the control register P2CR and the function register P2FC1, P2FC2 and P2FC3. A reset allows all
bits of the output latch P2 to be set to "1," all bits of P2CR, P2FC1, P2FC2 and P2FC3 to be cleared to "0," and
the port 2 to be put in output disabled mode.
The port 2 also performs a 16-bit timer input function. This function is enabled by setting the corresponding bit
of P2FC3 to "1" and the corresponding bits of P2CR, P2FC1 and P2FC2 to "0." A reset allows P2CR, P2FC1,
P2FC2 and P2FC3 to be cleared to "0" and the port 2 to function as an input port.
Besides the general-purpose input/output port function, the port 2 performs another function: A0 through A7
function as one address bus and A16 through A23 function as the other address bus. To access external memory,
registers P2CR and P2FC must be provisioned to allow the port 2 to function as an address bus.
If the BUSMD pin (port P45) is set to "L" level during a reset, the port 2 is put in separate mode (A16 to A23).
If it is set to "H" level during a reset, the port 2 is put in multiplexed mode (A0 through A7 or A16 through A23).
Input/Output Ports
TMP19A44 (rev1.3) 7-6
2010-04-01