tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 662

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Internal Clock
Electrical Characteristics
27.7
(external device to on-chip RAM transfer)
(on-chip RAM to external device transfer)
RD
WR
/
GCLKIN
DREQn
AD[15:0]
ALE
HWR
LWR
CS
R/W
GBSTART
GACK
asserted to
HWR
operation (memory-to-memory transfer).
(1) Indicates the condition under which Nth transfer is performed successfully.
(2) Indicates the condition under which (N + 1)th transfer is not performed.
Transfer with DMA Request
The following shows an example of a transfer between the on-chip RAM and an external device in
DVCC3=AVCC3n
Ta = －20 to 85
The following shows transfer operation timing of the on-chip RAM to an external bus during write
•
•
•
•
rising to
multiplex bus mode.
Parameter
16-bit data bus width, non-recovery time
Level data transfer mode
Transfer size of 16 bits, device port size (DPS) of 16 bits
Source/destination: on-chip RAM/external device
DREQn
DREQn
negated
(N-1)
°C
Add
negated
=
2.7V to 3.6V,
transfer
2Clk
(1) tDREQ_w
(1)
Data
tDREQ_r
TMP19A44 (rev1.3) 27-22
Symbol
tDREQ_r
tDREQ_w
(2)
(1) Min
（ W+1 ） x
-(W+2)x
tDREQ_w
Add
N
transfer
Equation
(2)
（2W＋ALE＋8）x－51
2Clk
（ 5+WAIT ） x － 51.8
tDREQ_r
Data
(2) Max
80 MHz (fsys)
-37.5
Min
25
(N+1)
Add
TMP19A44
Max
86.5
23.2
transfer
Data
Unit
ns
ns
2010-04-01