tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 62

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Exceptions/Interrupts
6.2.1.1
6.2.1.2
6.2
6.2.1 Factors
both a reset exception and NMI can be used, check the CP0 register to distinguish which one is generated.
Reset Exception/ Non-maskable Interrupt (NMI)
A reset exception and non-maskable interrupt are branch off to the same reset exception vector address. When
Reset exception and NMI have factors shown below.
・External reset pin
Setting an external reset pin to “L” and shift it to “H” generates a reset exception.
・WDT
WDT can generate a reset exception. See “Chapter 18 Watchdog timer” for details.
・External NMI pin
・WDT
・Write bus error
Factors of Reset Exception
Factors of NMI
Setting an external NMI pin to “L” generates NMI.
(TMP19A44 has no external NMI pin.）
WDT can generate NMI. See “Chapter 18 Watchdog timer” for details.
When an operand write bus cycle results in a bus error, NMI is generated instead of a bus error exception.
TMP19A44(rev1.3) 6-12
TMP19A44
2010-04-01