tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 118

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

ILEV
H1 processor core.
Exceptions/Interrupts
6.6.4.2
the highest priority and “1” the lowest. Note that any interrupt with interrupt level 0 is not suspended.
stored values are incremented in mask levels such that the previous CMASK is saved in PMASK0 and PMASK0 is
saved in PMASK1 and so on. For writing a new value to <CMASK>, set “1” to <MLEV> and write <CMASK>
simultaneously. Writing a new value to <PMASKx> cannot be made.
PMASK0 is moved to CMASK and PMASK1 is moved to PMASK0, and so on. The last <PMASK6> is set to “000.”
If it is used in returning from an interrupt process, be sure to set <MLEV> to “0” before executing the ERET
instruction. <MLEV> always reads “0.”
ILEV is the register to control the interrupt level to be used by INTC in notifying interrupt requests to the TX19A/
Interrupts with interrupt levels not higher than ILEV <CMASK> are suspended. The interrupt priority level “7” is
When a new interrupt is generated, the corresponding interrupt level is stored in <CMASK> and any previously
When <MLEV> is set to “0,” the interrupt mask levels in the register shift back to the previous state such that
(Note 1) This register must be 32-bit accessed.
(Note 2) Please set the mask level and <MLEV> individually.
(Note 3) Be sure to read the IVR value before changing the ILEV value. If the ILEV value is
(Note 4) Bit manipulation instructions cannot be used to access this register.
Interrupt Level Register (ILEV)
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
changed before reading IVR, an unexpected interrupt request may be generated.
0: Return
1: Change
CMASK
MLEV
mask
level
15
23
31
―
―
―
W
7
0
0
0
0
Interrupt mask level (previous)
Interrupt mask level (previous)
Interrupt mask level (previous)
TMP19A44(rev1.3) 6-68
Interrupt mask level (previous) 0
Interrupt Level Register
14
22
30
6
PMASK0
PMASK2
PMASK4
PMASK6
000
000
000
000
13
21
29
R
5
12
20
28
4
2
4
6
R
R
19
27
―
11
―
―
―
R
3
0
0
0
0
Interrupt mask level (current)
Interrupt mask level (previous)
Interrupt mask level (previous)
Interrupt mask level (previous)
10
18
26
2
TMP19A44
PMASK1
PMASK3
PMASK5
CMASK
R/W
000
000
000
000
17
25
1
9
2010-04-01
16
24
0
8
1
3
5