tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 327

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tmp19a44fda

Manufacturer Part Number
tmp19a44fda
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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TMP19A44
12.2 Description for Operations of Each Circuit
12.2.1
Prescaler
The prescaler is provided to acquire the TMRC source clock. The prescaler input clock φT0 is fperiph/2,
fperiph/4, fperiph/8, fperiph/16 or fperiph/32 selected by SYSCR1<PRCK2:0> in the CG. φT2 through
φT256 generated by dividing φT0 are available as TMRC prescaler input clocks and can be selected
with TBTCR<TBTCLK3:0>.
Fperiph is either "fgear" which is a clock selected by SYSCR1<FPSEL> in the CG, or "fc" which is a
clock before it is divided by the clock gear.
The operation or stoppage of the prescaler is set with TBTRUN<TBTPRUN> where writing "1" starts
counting and writing "0" clears and stops counting. Table 12-1 shows the prescaler output clock
resolutions.
32-bit Input Capture (TMRC)
TMP19A44 (rev1.3) 12-2
2010-04-01

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