tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 440

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Serial Bus Interface (SBI)
16.5.14 Software Reset
16.5.15 Serial Bus Interface Data Buffer Register (SBIDBR)
16.5.16 I
16.5.17 IDLE Setting Register (SBIBR0)
If the serial bus interface circuit locks up due to external noise, it can be initialized by using a software
reset.
Writing "10" followed by "01" to SBICR2 <SWRST1:0> generates a reset signal that initializes the
serial bus interface circuit. After a reset, all control registers and status flags are initialized to their reset
values. When the serial bus interface is initialized, <SWRST> is automatically cleared to "0."
(Note)
Reading or writing SBIDBR initiates reading received data or writing transmitted data. When the SBI
is acting as a master, setting a slave address and a direction bit to this register generates the start
condition.
When the SBI is configured as a slave device, the I2CAR<SA6:0> bit is used to specify a slave address.
If I2C0AR <ALS> is set to "0," the SBI recognizes a slave address transmitted by the master device and
receives data in the addressing format. If <ALS> is set to "1," the SBI does not recognize a slave
address and receives data in the free data format.
The SBIBR0<I2SBI> register determines if the SBI operates or not when it enters the IDLE mode. This
register must be programmed before executing an instruction to switch to the standby mode.
2
C Bus Address Register (I2CAR)
A software reset causes the SBI operating mode to switch from the I
to the port mode.
TMP19A44 (rev1.3) 16-16
TMP19A44
2010-04-01
2
C mode