tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 344

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

13.3 Operation Mode
Counting mode is selected from normal mode or quadruple mode according to PHCMD of the control register (PHCCR).
The counter is incremented or decremented by one depending on the state transition of the asynchronous two-phase pulse
that is input through PHCNTIN0 and PHCNTIN1. An interrupt can be generated by each count or when counter value
matches with a value set in the compare register 0 or 1. The timing to generate an interrupt is selectable with the control
register.
Two-phase Pulse Input Counter (PHCNT)
・Count up
・Count down
1)
PHCN0IN1
PHCN0IN0
Normal mode
(a) Count value is incremented by one when “2” is input at the previous clock and the current state is “3”.
(b) Count value is cleared when “3” is input at the previous clock and the current state is “2”.
(c) Count value is set when “3” is input at the previous clock and the current state is “1”.
(a) Count value is decremented by one when “1” is input at the previous clock and the current state is “3”.
(b) Count value is cleared when “3” is input at the previous clock and the current state is “1”.
(c) Count value is set when “3” is input at the previous clock and the current state is “2”.
PHCN0IN1
PHCN0IN0
3
set
3
set
1
2
0
0
2
UP＋1
DOWN－1
clr
1
TMP19A44(rev1.3)13-4
clr
3
3
After (b) is executed,
(a) is not executed
unless (c) is executed.
After (b) is executed,
(a) is not executed
unless (c) is executed.
TMP19A44
2010-05-10