tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 428

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

SBICR1
(0xFF00_4B04)
<Bit 2:0><SCK2:0>
<Bit 0>< SWRMON:0>
Serial Bus Interface (SBI)
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Select the number of bits per
transfer (Note 1)
This can be read as "0."
This can be read as "0."
This can be read as "0."
BC2
15
23
31
: Selects internal SCL output clock frequency.
: Software reset status monitor
7
0
Serial bus interface control register 1
BC1
R/W
14
22
30
6
0
TMP19A44 (rev1.3) 16-4
BC0
13
21
29
5
0
Acknowled
gment
clock
0: Not
1: Generate
generate
ACK
R/W
12
20
28
4
0
On writing <SCK2:0>: Select internal SCL output clock
frequency
On reading <SWRMON>: Software reset status
monitor
<Bit 7:5><BC2:0>Select the number of bits per
transfer
000
001
010
011
100
101
110
111
<BC2:0>
R
R
R
0
1
0
0
0
000
001
010
011
100
101
110
111
This can
be read
as "1."
n=10
n=11
n=5
n=6
n=7
n=8
n=9
11
19
27
R
3
1
Software reset operation is in progress.
Software reset operation is not in progress.
# of clock
384 kHz
294 kHz
200 kHz
121 kHz
68 kHz
36 kHz
18 kHz
reserved
cycles
Select internal SCL output clock
frequency (Note 2) and reset
monitor
8
1
2
3
4
5
6
7
<ACK> = 0
SCK2
10
18
26
2
0
R/W
length
Data
System clock
(=80 MHz)
Clock gear
Frequency
TMP19A44
8
1
2
3
4
5
6
7
SCK1
17
25
1
0
9
# of clock
: fc/1
cycles
= [ Hz ]
: fsys
SWRMON
9
2
3
4
5
6
7
8
<ACK> = 1
2010-04-01
SCK0/
R/W
16
24
8
0
1
length
Data
8
1
2
3
4
5
6
7