tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 609

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

7)
Flash Memory Operation
Acknowledge Responses
Note: The upper four bits of the ACK response are the same as those of the previous command
Note: If the serial operation mode is determined as UART, the boot program checks if the SIO can
0x?8 (See Note)
0x?1 (See Note)
0x10
Return Value
Return Value
the values of possible acknowledge responses to the received data. The upper four bits of the
acknowledge response are equal to those of the command being executed. Bit 3 of the code indicates a
receive error. Bit 0 indicates an invalid command error, a checksum error or a password error. Bit 1 and
bit 2 are always 0. Receive error checking is not done in I/O Interface mode.
The boot program represents processing states with specific codes. Table 24.7 to Table 24.14 show
0x86
0x30
code.
be programmed to the baud rate at which the operation mode byte was transferred. If that
baud rate is not possible, the boot program aborts, without sending back any response.
Table 24.7 ACK Response to the Serial Operation Mode Byte
The SIO can be configured to operate in UART mode. (See Note)
The SIO can be configured to operate in I/O Interface mode.
A receive error occurred while getting a command code.
An undefined command code was received. (Reception was completed normally.)
The RAM Transfer command was received.
Table 24.8 ACK Response to the Command Byte
TMP19A44 (rev1.3)24-24
Meaning
Meaning
TMP19A44
2010-04-01