tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 319

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

16-bit Timer/Event Counters (TMRBs)
TB1EN
TB1RUN
TB1RG0
TB1RG1
TB1CR
TB1FFCR
TB1MOD
P5CR
P5FC2
TB1RUN
Each register in the 16-bit PPG output mode must be programmed as listed below.
TB1RG0-W R
X; Don't care −; no change
TB1 IN0
φT16
TB1RUN<TB1RDE>
φT1
φT4
← 1
← X X X X X 0
← *
← *
← *
← *
← 1
← X X 0
← 0
← −
← −
← −
← 1
Selector
7
Selector
X X X X X X X
Fig. 11.4 Block Diagram of 16-bit PPG Mode
6
0
0
0
−
−
−
*
*
*
*
X
5
1
−
−
−
0
*
*
*
*
4
0
0
0
1
1
0
0
*
*
*
*
(** = 01, 10, 11)
TMP19A44(rev1.3) 11-21
16-bit comparator
Register buffer 0
3
0
1
0
−
−
−
−
*
*
*
*
TB1RG0
2
0
1
1
−
−
−
1
*
*
*
*
X
X
1
0
1
−
−
−
*
*
*
*
*
0
0
0
0
−
−
−
1
*
*
*
*
*
16-bit up-counter
Match
UC1
Internal data bus
Starts the TMRB1 module.
Disables the TB1RG0 double buffering and
stops TMRB1.
Specifies a duty. (16 bits *This is a 32-bit register)
Specifies a cycle. (16 bits *This is a 32-bit register)
Enables the TB1RG0 double buffering.
(Changes the duty/cycle when the INTTB1 interrupt is
generated)
Specifies to trigger TB1FF0 to reverse when a match
with TB1RG0 or TB1RG1 is detected, and sets the
initial value of TB1FF0 to "0."
Designates the prescaler input clock as the output clock,
and disables the capture function.
Assigns P55 to TB1OUT.
Starts TMRB1.
TB1RUN<TB0RUN>
16-bit comparator
Register buffer 1
TB1RG1
Clear
TB1OUT (PPG output)
(TB1FF0)
TMP19A44
F/F
2010-04-01