tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 41

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

<Example 1>
<Example 2>
Clock/Standby Control
(Note) The phase difference (AC timing) between the system clock output by the SCOUT and the
(Note) The system clock cannot be output from SCOUT in backup mode.
SCOUT selection
<SCOSEL1:0> = “00”
<SCOSEL1:0> = “01”
<SCOSEL1:0> = “10”
<SCOSEL1:0> = “11”
(Note 1)
(Note 2)
5.4.3 System Clock Pin Output Function
output from the P44/SCOUT pin. By setting the port 4 related registers, P4CR<P44C> to "1" and P4FC1<P44F> to
"1," the P44/SCOUT pin becomes the SCOUT output pin.
SYSCR2<SCOSEL1:0>.
The system clock fsys and fsys/2, prescaler input clock for peripheral I/O φT0 and low-speed clock fs can be
Table 5.2 shows the pin states in each standby mode when the P44/SCOUT pin is set to the SCOUT output.
OSCCR0<WUPT2:0>＝"xx": Select the warm-up time
OSCCR0<WUPSEL>＝"1": Warm-up time XT1
OSCCR1<XTEN>＝"1": Enable the low-speed oscillation (fs)
OSCCR0<WUEON>＝"1": Start the warm-up timer (WUP)
OSCCR0<WUEF>Read: Wait until the state becomes "0" (WUP is finished)
CKSEL<SYSCK>＝"1": Switch the system clock to low speed (fs)
CKSEL<SYSCKFLG>Read: Confirm that the current state is "1" (the current system clock is fs)
OSCCR1<XEN>＝"0": Disable the high-speed oscillation (fosc)
OSCCR0<WUPT2:0>＝"xx": Select the warm-up time
OSCCR0<WUPSEL>＝"0": Warm-up time X1
OSCCR1<XEN>＝"1": Enable the high-speed oscillation (fosc)
OSCCR0<WUEF>＝"1": Start the warm-up timer (WUP)
OSCCR0<WUEF>Read: Wait until the state becomes "0" (WUP is finished)
CKSEL<SYSCK>＝"0": Switch the system clock to high speed (fgear)
OSCCR1<XTEN>＝"0": Disable the low-speed oscillation (fs)
CKSEL<SYSCKFLG>Read: Confirm that the current state is "0" (the current system clock is
internal clock is not guaranteed.
fgear)
Before switching the system clock, ensure that the clock is properly switched by
reading the CKSEL<SYSCKFLG> bit.
Transition from the NORMAL mode to the SLOW mode
Transition from the SLOW mode to the NORMAL mode
Mode
In the SLOW mode, the CPU operate with the low-speed clock, and the INTC, the real
time clock timer, the IO port, the EBIF (external bus interface) and the PHTCNT,KWUP
are operable. Stop other internal peripheral functions before the system enters the
SLOW mode.
Output the
Output the fsys clock.
Output the φT0 clock.
Table 5.2 SCOUT Output State in Each Standby Mode
NORMAL
fsys/2
clock.
TMP19A44(rev1.3) 5-12
SLOW
Output the fs clock.
IDLE
The output clock is selected by setting the
Standby mode
SLEEP
TMP19A44
Fixed to “0” or “1”.
2010-04-01
STOP