tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 32

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Clock/Standby Control
5.1 Clock System Block Diagram
5.1.1 Main System Clock
(Note)
Switching of clock gear is executed when a value is written to the SYSCR1<GEAR2:0>
register. There are cases where switching does not occur immediately after the change
in the register setting but the original clock gear is used for execution of instructions. If
it is necessary to use the new clock for execution of the instructions following to the
clock gear switching instruction, insert a dummy instruction (to execute a write cycle).
To use the clock gear, ensure that you make the time setting such that φTn of the
prescaler output from each block in the peripheral I/O is calibrated to φTn<fsys/2 (φTn
becomes slower than fsys/2). Do not switch the clock gear during operation of the timer
counter or other peripheral I/O.
8~10（MHz）
30KHz~34 KHz
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Input frequency (low frequency)
Input frequency range
Input frequency
Allows for oscillator connection or external clock input.
Clock gear (1/2, 1/4, 1/8 and 1/16)
Input frequency
(After reset: 1/1)
PLL is off: 1/2 or 1/1 is selectable.
(Precautions for switching the high-speed clock gear)
* PLL is on: Clock gear 1/8 (default) is used when 8 MHz (MIN) is input.
TMP19A44(rev1.3) 5-3
Maximum operating
frequency
Maximum operating
80 MHz
frequency
34 kHz
Minimum operating
frequency
4 MHz *
TMP19A44
2010-04-01