tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 483

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Watchdog Timer
18.2 Watchdog Timer Interrupt
The watchdog timer consists of the binary counters that are arranged in 22 stages and work using the f
system clock as an input clock. The outputs produced by these binary counters are 2
By selecting one of these outputs with WDMOD <WDTP1:0>, a watchdog timer interrupt can be generated
when an overflow occurs, as shown in Fig. 18.2.
Because the watchdog timer interrupt is a non-maskable interrupt factor, NMIFLG <WDT> at the INTC
performs a task of identifying it.
When an overflow occurs, resetting the chip itself is an option to choose. If the chip is reset, a reset is affected
for a 32-state time, as shown in Fig. 18.3. If this reset is affected, the clock f
dividing the clock f
WDT counter
WDT interrupt
WDT clear
WDT counter
WDT interrupt
Internal reset
(Runaway Detection Timer)
C
of the high-speed oscillator by 16 is used as an input clock f
n
n
32-state (12.8 μs @ f
Overflow
Fig. 18.2 Normal Mode
Fig. 18.3 Reset Mode
TMP19A44(rev0.3) 18-2
Overflow
C
= 40 MHz, f
Write of a clear code
sys
= 5 MHz, f
SYS
sys/2
that the clock gear generates by
SYS/2
= 2.5 MHz)
.
16
TMP19A44
, 2
18
, 2
20
, 2
0
22
, 2
2010-04-01
24
and 2
SYS/2
26
.