tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 104

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Exceptions/Interrupts
(Note 1) When the processor accepts an interrupt request from the interrupt controller, the value of
(Note 2) On an ERET, the value of the PSS field is restored to the CSS field.
(Note 3) The instruction that modifies the contents of the SSCR register must be followed by two
(Note 4) When the SSD bit is set, the Shadow Register Set is not updated by any interruptions.
(Note 5) When the SSD bit is set, only shadow set 0 is accessible, and the value of the CSS field is
(Note 6) The following shows how the SSCR register operates in generating an interrupt or in
After returning from
(ERET instruction)
Before interrupt
the CSS field is copied to the PSS field, and the CSS field is updated with the value of the new
interrupt request level.
NOPs to avoid pipeline hazards.
Ex.)
ignored.
returning from an interrupt.
After interrupt
interrupt
MTC0
NOP
NOP
ADD
r18, SSCR
r19, r12, r13
TMP19A44(rev1.3) 6-54
PSS
xxx
2
2
Interrupt level = 5
TMP19A44
CSS
2
5
2
2010-04-01