tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 597

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tmp19a44fda

Manufacturer Part Number
tmp19a44fda
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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Flash Memory Operation
24.2.3
TMP19A44F on-chip boot ROM. This boot ROM is a masked ROM. When Single Boot mode is selected
upon reset, the boot ROM is mapped to the address region including the interrupt vector table while the flash
memory is mapped to an address region different from it.
TMP19A44F is connected to an external host controller. Via this serial link, a programming routine is
downloaded from the host controller to the TMP19A44F on-chip RAM. Then, the flash memory is re-
programmed by executing the programming routine. The host sends out both commands and programming
data to re-program the flash memory.
contents of the flash memory, the validity of the application’s password is checked before a programming
routine is downloaded into the on-chip RAM. If password matching fails, the transfer of a programming
routine itself is aborted.
globally disabled in Single Boot mode while the flash memory is being erased or programmed. In Single
Boot mode, the boot-ROM programs are executed in Normal mode.
writing/ erasing during subsequent Single-Chip (Normal mode) operations. For a detailed description of the
erase and program sequence, refer to On-Board Programming and Erasure.
In Single Boot mode, the flash memory can be re-programmed by using a program contained in the
Single Boot mode allows for serial programming of the flash memory. Channel 0 of the SIO (SIO0) of the
Communications between the SIO0 and the host must follow the protocol described later. To secure the
As in the case of User Boot mode, all interrupts including the non-maskable (NMI) interrupt must be
Once re-programming is complete, it is recommended to protect relevant flash blocks from accidental
Single Boot Mode
TMP19A44 (rev1.3)24-12
TMP19A44
2010-04-01

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