tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 577

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

JTAG Interface
Data is serially scanned in.
482
3
TCK
23.3.3
23.3.4
Instruction register
TMS and TDI are sampled on the rising
edge of TCK.
Bypass register
Boundary scan
register
The boundary scan register has inputs and outputs for some analog output signals, as well as all signals
from the TMP19A44 except control signals. Pins of the TMP19A44 can drive any test patterns by
scanning data into the boundary scan register in the Shift-DR state. After the boundary scan register
goes into the Capture-DR state, data enters the processor, is shifted, and inspected.
The boundary scan register forms a data path. It basically functions as a single shift register of 483-bit
width. Cells in this data path are connected to all input and output pads of the TMP19A44.
The TDI input is introduced to the least significant bit (LSB) in the boundary scan register. The most
significant bit in the boundary scan register is taken out of the TDO output.
The test access port (TAP) consists of five signal pins: TRST, TDI, TDO, TMS, and TCK. Serial test
data, instructions and test control signals are sent and received through these signal pins.
Data is serially scanned into one of three registers (instruction register, bypass register and boundary
scan register) via the TDI pin or it is scanned out from one of these three registers into the TDO pin, as
shown in Fig. 23-6.
The TMS input is used to control the state transitions of the main TAP controller state machine. The
TCK input is a test clock exclusively for shifting serial JTAG data synchronously; it works
independently of a chip core clock or a system clock.
Data through the TDI and TMS pins are sampled on the rising edge of the input clock signal TCK. Data
through the TDO pin changes on the falling edge of the clock signal TCK.
0
Boundary Scan Register
Test Access Port (TAP)
0
0
Fig. 23-6 JTAG Test Access Port
TMP19A44(rev1.3) 23-5
TDI pin
TMS pin
482
３
Instruction register
Bypass register
Boundary scan
register
Data is serially scanned out.
TDO is sampled on the falling edge
of TCK.
0
0
0
TMP19A44
2010-04-01
TDO pin