tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 357

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Serial Channel (SIO)
•
Example baud rate setting:
1)
2)
buffering is not used, the highest baud rate will be 5 Mbps applying the divide ratio of "2.")
Division by an integer (divide by N):
Selecting fc = 39.321 MHz for fperiph, setting φT0 to fperiph/8, using the baud rate generator
input clock φT1, setting the divide ratio N (BR0CR<BR0S3:0>) = 4, and setting
BR0CR<BR0ADDE> = "0," the resulting baud rate in the UART mode is calculated as
follows:
* Clocking conditions
Baud rate =
= 39.321 (bps) × 10
(Note)
For divide by N + (16-K)/16 (only for UART mode):
Selecting fc = 19.2 MHz for fperiph, setting φT0 to fperiph/8, using the baud rate generator
input clock φT2, setting the divide ratio N (BR0CR<BR0S3:0>) = 7, setting K
(BR0ADD<BR0K3:0>) = 3, and selecting BR0CR<BR0ADDE> = 1, the resulting baud rate
is calculated as follows:
* Clocking conditions
Baud rate =
= 19.2 × 10
The divide by (N + (16-K)/16) function is inhibited and thus BR0ADD
<BR0K3:0> is ignored.
6
fc/32
7
/ 32 / (7 +
+
4
fc/32
(16
6
16
TMP19A44(rev1.3) 14-5
/16
−
/ 32 / 4 / 16 ≈ 19200 (bps)
3)
13
16
System clock
High speed clock gear :
Prescaler clock
System clock
High-speed clock gear :
Prescaler clock
/16
) / 16 = 4800 (bps)
:
:
:
:
High-speed (fc)
f
High-speed (fgear)
f
1/2 (fc)
1/4 (fgear)
periph
periph
/8 (f
/4 (f
periph
periph
= f
= f
TMP19A44
sys
sys
)
)
2010-04-01