tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 108

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tmp19a44fda

Manufacturer Part Number
tmp19a44fda
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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Exceptions/Interrupts
IMCGC
(Note 1)
(Note 2)
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
“0” is read. Active state setting of INT8 standby
“0” is read. Active state setting of INT9 standby
“0” is read. Active state setting of INTA standby
“0” is read. Active state setting of INTB standby
Refer to EMSTxx bit to know the active condition which is used for clearing
standby.
Please specify the bit for the edge first and then specify the bit for the
<INTxEN>. Setting them simultaneously is prohibited.
15
23
31
7
R
R
R
R
0
0
0
0
clear request. (101~111: setting
prohibited)
clear request. (101~111: setting
prohibited)
clear request. (101~111: setting
prohibited)
clear request. (101~111: setting
prohibited)
000: “L” level
001: “H” level
010: Falling edge
011: Rising edge
100: Both edges
000: “L” level
001: “H” level
010: Falling edge
011: Rising edge
100: Both edges
0
000: “L” level
001: “H” level
010: Falling edge
011: Rising edge
100: Both edges
000: “L” level
001: “H” level
010: Falling edge
011: Rising edge
100: Both edges
EMCGA
EMCGB
EMCG8
EMCG9
14
22
30
6
2
2
2
2
0
0
0
TMP19A44(rev1.3) 6-58
EMCGA
EMCGB
EMCG8
EMCG9
R/W
R/W
R/W
R/W
13
21
29
5
1
1
1
1
1
1
1
1
EMCGA
EMCGB
EMCG8
EMCG9
12
20
28
4
0
0
0
0
0
0
0
0
standby clear request
standby clear request
standby clear request
standby clear request
Active state of INT8
Active state of INT9
Active state of INTA
Active state of INTB
00: -
01: Rising edge
10: Falling edge
11: Both edges
00: -
01: Rising edge
10: Falling edge
11: Both edges
00: -
01: Rising edge
10: Falling edge
11: Both edges
00: -
01: Rising edge
10: Falling edge
11: Both edges
EMSTA
EMSTB
EMST8
EMST9
19
27
11
3
1
0
1
0
1
0
1
0
R
R
R
R
EMSTA
EMSTB
EMST8
EMST9
10
18
26
2
0
0
0
0
0
0
0
0
TMP19A44
“0” is read. INT8 clear
“0” is read. INT9 clear
“0” is read. INTA clear
“0” is read. INTB clear
17
25
1
R
9
R
R
R
0
0
0
0
2010-04-01
input
0: Disable
1: Enable
input
0: Disable
1: Enable
input
0: Disable
1: Enable
input
0: Disable
1: Enable
INTAEN
INT8EN
INTBEN
INT9EN
R/W
R/W
R/W
R/W
16
24
0
8
0
0
0
0

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