M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 773

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Timer Timing
(T
Notes 1. T = 1/f
Remarks 1. n = Q00, Q01, Q02, Q03, P00, P01, P20, P21
Timer Input Timing
TIn high-level width
TIn low-level width
EVTQ0 high-level width
EVTQ0 low-level width
TRGQ0 high-level width
TRGQ0 low-level width
TIUD10/TCUD10 high-level width
TIUD10/TCUD10 low-level width
TCLR10 high-level width
TCLR10 low-level width
TIUD10/TCUD10 input time
differential
C
A
L
= −40 to +85°C, V
= 50 pF)
Remark
TCUD10 (input)
TCLR10 (input)
TRGQ0 (input)
TIUD10 (input)
EVTQ0 (input)
2. T
Note 2
TIn (input)
2. The above specification shows a pulse width that is accurately detected as a valid edge. Even if a
smp
Parameter
pulse narrower than the above specification is input, therefore, it may be detected as a valid edge.
: Noise elimination sampling clock cycle (set by NRC10 register)
n = Q00, Q01, Q02, Q03, P00, P01, P20, P21
XX
Note 1
Note 1
Note 1
Note 1
Note 1
Note 2
Note 1
Note 2
DD
= CV
Note 2
CHAPTER 23 ELECTRICAL SPECIFICATIONS (V850E/IA3)
Note 2
DD
= 2.3 to 2.7 V, AV
t
t
t
t
t
t
t
t
t
WUDHm
t
WUDLm
WTCHm
WTCLm
t
WEVHn
WEVLn
WTRHn
WTRLn
WTIHn
WTILn
PHUD
Symbol
<7>/<9>/<11>/<15>
<10>
<11>
<12>
<13>
<14>
<15>
<16>
<17>
<7>
<8>
<9>
<13>
User’s Manual U16543EJ4V0UD
<13>
DD
Conditions
= EV
<17>
DD
= 4.0 to 5.5 V, V
<8>/<10>/<12>/<16>
5T
5T
5T
5T
5T
10T
10T + 10
10T + 10
10T + 10
10T + 10
10T + 10
<14>
smp
smp
smp
smp
smp
MIN.
+
<14>
+
+
+
+
+
SS
10
10
10
10
10
10
= AV
SS
= CV
MAX.
SS
<17>
= EV
SS
= 0 V,
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
771

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