M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 696

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
694
(1) External interrupt rising edge specification register 0 (INTR0), external interrupt falling edge
Caution When not using these pins as the INTPn pins, be sure to clear the INTF0n and INTR0n bits to 00.
Remark
Note Valid only for the V850E/IA4.
Remark
INTF0n
0
0
1
1
specification register 0 (INTF0)
The INTR0 and INTF0 registers are 8-bit registers that specify the trigger mode of the INTP0, INTP1
(V850E/IA4 only), and INTP2 to INTP7 pins and can specify the valid edge independently for each pin (rising
edge, falling edge, or both rising and falling edges).
These registers can be read or written in 8-bit or 1-bit units.
Reset sets these registers to 00H.
Caution When the function is changed from the external interrupt function (alternate function) to the
In the V850E/IA3, be sure to clear these bits to 0.
V850E/IA3: n = 0, 2 to 7
V850E/IA4: n = 0 to 7
For the valid edge specification, see Table 17-3.
INTR0
INTF0
After reset: 00H
After reset: 00H
INTR0n
port mode, an edge may be detected. Therefore, be sure to clear the INTF0n and INTR0n bits
to 00, and then set the port mode (V850E/IA3: n = 0, 2 to 7, V850E/IA4: n = 0 to 7).
0
1
0
1
INTR07
INTF07
CHAPTER 17 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Table 17-3. Valid Edge Specification of INTP0 to INTP7 Pins
<7>
<7>
No edge detected
Rising edge
Falling edge
Both rising and falling edges
R/W
R/W
INTR06
INTF06
<6>
<6>
Address: FFFFFC20H
Address: FFFFFC00H
INTR05
INTF05
User’s Manual U16543EJ4V0UD
<5>
<5>
INTR04
INTF04
<4>
<4>
Valid Edge Specification
INTR03
INTF03
<3>
<3>
INTR02
INTF02
<2>
<2>
INTR01
INTF01
<1>
<1>
Note
Note
INTR00
INTF00
<0>
<0>

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