M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 183

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(2) TMPn control register 1 (TPnCTL1)
Notes 1. This bit can only be set in TMP0 and TMP1. Be sure to clear bit 7 of TMP2 and TMP3 to 0. For
The TPnCTL1 register is an 8-bit register that controls the TMPn operation.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
2. This bit can only be set in TMP0 and TMP2 in the V850E/IA3. Be sure to clear bit 6 of TMP1 and
3. This bit can only be set in TMP0 and TMP2. Be sure to clear bit 5 of TMP1 and TMP3 to 0.
4. Set the valid edge selection of capture trigger input (TIPk0 pin) to “No edge detection”.
details of tuning operation mode, see CHAPTER 10 MOTOR CONTROL FUNCTION.
TMP3 to 0.
This bit can only be set in TMP0, TMP2, and TMP3 in the V850E/IA4. Be sure to clear bit 6 of TMP1
to 0.
V850E/IA3
n = 0 to 3
m = 0, 2
k = 0, 2
a = 0, 1
V850E/IA4
n = 0 to 3
m = 0, 2, 3
k = 0, 2
a = 0, 1
TPnCTL1
After reset: 00H
TPmEST
TPaSYE
TPaSYE
TMPa can be used only as an A/D conversion start trigger factor of A/D converters 0
and 1 during the tuning operation.
In the tuning operation mode, this bit always operates in synchronization with TMQa.
Read value of the TPmEST bit is always 0.
The TPkEEE bit selects whether counting is performed with the internal count clock
or the valid edge of the external event count input.
TPkEEE
0
1
0
1
0
1
7
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
Note 1
Note 1
Note 2
TPmEST
TMPa single mode
Tuning operation mode (see 10.4.5)
Generate a valid signal for external trigger input.
• In one-shot pulse output mode:
• In external trigger pulse output mode:
Disable operation with external event count input (TIPk0 pin).
(Perform counting with the count clock selected by the
TPkCTL0.TPkCKS0 to TPkCTL0.TPkCKS2 bits.)
Enable operation with external event count input (TIPk0 pin)
(Perform counting at the valid edge of the external event count input
signal.)
R/W
A one-shot pulse is output with writing 1 to the TPmEST bit as the
trigger.
A PWM waveform is output with writing 1 to the TPmEST bit as
the trigger.
6
Note 2
Address: TP0CTL1 FFFFF641H, TP1CTL1 FFFFF661H,
User’s Manual U16543EJ4V0UD
TPkEEE
5
Note 3
TP2CTL1 FFFFF681H, TP3CTL1 FFFFF6A1H
Operation mode selection
Software trigger control
4
0
Count clock selection
−
3
0
TPnMD2 TPnMD1 TPnMD0
2
1
Note 4
.
0
(1/2)
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