M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 675

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
17.2.1 Operation
transfers control to the handler routine.
If a non-maskable interrupt request signal (INTWDT) is generated, the CPU performs the following processing, and
(1) Saves the restored PC to FEPC.
(2) Saves the current PSW to FEPSW.
(3) Writes the exception code (0010H) to the higher halfword (FECC) of ECR.
(4) Sets the PSW.NP and PSW.ID bits (1) and clears the PSW.EP bit (0).
(5) Loads the handler address (00000010H) of the non-maskable interrupt routine to the PC, and transfers control.
The following shows the non-maskable interrupt servicing.
INTC acknowledged
CPU processing
CHAPTER 17 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Figure 17-1. Non-Maskable Interrupt Servicing
Non-maskable interrupt request
FEPC
FEPSW
ECR. FECC
PSW. NP
PSW. EP
PSW. ID
PC
Interrupt servicing
INTWDT input
PSW. NP
User’s Manual U16543EJ4V0UD
0
Restored PC
PSW
Exception code
1
0
1
00000010H
1
Interrupt request pending
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