M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 235

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(d) Conflict between trigger detection and match with CCR0 buffer register
If the trigger is detected immediately after the INTTPmCC0 signal is generated, the 16-bit counter is
cleared to 0000H and continues counting up. Therefore, the active period of the TOPm1 pin is extended by
time from generation of the INTTPmCC0 signal to trigger detection.
Remark
If the trigger is detected immediately before the INTTPmCC0 signal is generated, the INTTPmCC0 signal
is not generated. The 16-bit counter is cleared to 0000H, the TOPm1 pin is asserted, and the counter
continues counting. Consequently, the inactive period of the PWM waveform is shortened.
Remark
External trigger input
External trigger input
CCR0 buffer register
CCR0 buffer register
INTTPmCC0 signal
V850E/IA3: m = 0, 2, k = 0, 2
V850E/IA4: m = 0, 2, 3, k = 0, 2
INTTPmCC0 signal
V850E/IA3: m = 0, 2, k = 0, 2
V850E/IA4: m = 0, 2, 3, k = 0, 2
TOPm1 pin output
TOPm1 pin output
(TIPk0 pin input)
(TIPk0 pin input)
16-bit counter
16-bit counter
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
FFFF
FFFF
User’s Manual U16543EJ4V0UD
0000
0000
D
D
0
D
0
D
− 1
− 1
0
0
D
D
Shortened
0
0
Extended
0000
0000
0000
0001
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