M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 286

no-image

M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
284
(5) TMQ0 I/O control register 2 (TQ0IOC2)
Cautions 1. Rewrite the TQ0EES1, TQ0EES0, TQ0ETS1, and TQ0ETS0 bits when the TQ0CTL0.TQ0CE bit
The TQ0IOC2 register is an 8-bit register that controls the valid edge for the external event count input signal
(EVTQ0 pin) and external trigger input signal (TRGQ0 pin).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Remark
2. The TQ0EES1 and TQ0EES0 bits are valid only when the TQ0CTL1.TQ0EEE bit = 1 or when
3. The TQ0ETS1 and TQ0ETS0 bits are valid only in the external trigger pulse output mode or
TQ0IOC2
= 0. (The same value can be written when the TQ0CE bit = 1.) If rewriting was mistakenly
performed, clear (0) the TQ0CE bit and then set the bits again.
the external event count mode is set (TQ0CTL1.TQ0MD2 to TQ0CTL1.TQ0MD0 bits = 001).
one-shot pulse output mode.
TMQ1 does not have the TQ1IOC2 register.
After reset: 00H
TQ0EES1
TQ0ETS1
0
0
1
1
0
0
1
1
7
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
TQ0EES0
TQ0ETS0
R/W
6
0
0
1
0
1
0
1
0
1
Address: FFFFF5C4H
External event count input signal (EVTQ0 pin) valid edge setting
User’s Manual U16543EJ4V0UD
No edge detection (external event count invalid)
Detection of rising edge
Detection of falling edge
Detection of both edges
No edge detection (external trigger invalid)
Detection of rising edge
Detection of falling edge
Detection of both edges
External trigger input signal (TRGQ0 pin) valid edge setting
5
0
4
0
TQ0EES1 TQ0EES0 TQ0ETS1 TQ0ETS0
3
2
1
0

Related parts for M-V850E-IA4