M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 210

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
208
(c) Notes on rewriting TPnCCR0 register
If the value of the TPnCCR0 register is rewritten to a smaller value during counting, the 16-bit counter may
overflow. When an overflow may occur, stop counting and then change the set value.
Remarks 1. Interval time (1):
If the value of the TPnCCR0 register is changed from D
less than D
has been rewritten. Consequently, the value of the 16-bit counter that is compared is D
Because the count value has already exceeded D
overflows, and then counts up again from 0000H. When the count value matches D
signal is generated and the output of the TOP00 pin is inverted.
Therefore, the INTTPnCC0 signal may not be generated at the interval time “(D
or “(D
+ 1) × Count clock cycle”.
INTTPnCC0 signal
2
TPnCCR0 register
TOP00 pin output
+ 1) × Count clock cycle” originally expected, but may be generated at an interval of “(10000H + D
16-bit counter
2. n = 0 to 3
1
TP0OL0 bit
, the count value is transferred to the CCR0 buffer register as soon as the TPnCCR0 register
TPnCE bit
Interval time (NG): (10000H + D
Interval time (2):
FFFFH
0000H
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
L
Interval time (1)
(D
(D
User’s Manual U16543EJ4V0UD
1
2
+ 1) × Count clock cycle
+ 1) × Count clock cycle
D
1
D
1
2
+ 1) × Count clock cycle
D
2
Interval time (NG)
2
, however, the 16-bit counter counts up to FFFFH,
D
1
1
to D
2
while the count value is greater than D
D
2
D
2
Interval
time (2)
D
2
1
+ 1) × Count clock cycle”
2
.
2
, the INTTPnCC0
2
but
2

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