M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 442

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.4 Operation
10.4.1 System outline
440
(1) Outline of 6-phase PWM output
The 6-phase PWM output mode is used to generate a 6-phase PWM output wave, by using TMQn and the
TMQn option in combination.
The 6-phase PWM output mode is enabled by setting the TQnCTL1.TQnMD2 to TQnCTL1.TQnMD0 bits of
TMQn to “111”.
One 16-bit counter and four 16-bit compare registers of TMQn are used to generate a basic 3-phase wave.
The functions of the compare registers are as follows.
TMPn can perform a tuning operation with TMQn to start a conversion trigger source for A/D converters 0 and
1.
Remark
Remark
A dead-time interval is generated from the basic 3-phase wave generated by using three 10-bit dead-time
counters and one compare register to create a wave with a reverse phase to that of the basic 3-phase wave.
Then a 6-phase PWM output wave (U, U, V, V, W, and W) is generated.
The 16-bit counter for generating the basic 3-phase wave counts up or down. After the operation has been
started, this counter counts up. When its count value matches the cycle set to the TQnCCR0 register, the
counter starts counting down. When the count value matches 0001H, the counter counts up again. This
means that a value two times higher than the value set to the TQnCCR0 register +1 is the carrier cycle.
10-bit dead-time counters 1 to 3 that generate the dead-time interval count up. Therefore, the value set to the
TMQn dead-time compare register (TQnDTC) is used as a dead-time value as is. Because three counters are
used, dead time can be generated independently in phases U, V, and W. However, because there is only one
register that specifies a dead-time value (TQnDTC), the same dead-time value is used in the three phases.
TQnCCR0 register
TQnCCR1 register
TQnCCR2 register
TQnCCR3 register
Compare Register
V850E/IA3: n = 0
V850E/IA4: n = 0, 1
m = Set value of TQnCCR0 register
i = Set value of TQnCCR1 register
j = Set value of TQnCCR2 register
k = Set value of TQnCCR3 register
CHAPTER 10 MOTOR CONTROL FUNCTION
Setting of cycle
Specifying output width of phase U
Specifying output width of phase V
Specifying output width of phase W
User’s Manual U16543EJ4V0UD
Function
0002H ≤ m ≤ FFFEH
0000H ≤ i ≤ m + 1
0000H ≤ j ≤ m + 1
0000H ≤ k ≤ m + 1
Settable Range