M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 582

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
14.5 Interrupt Request Signals
reception end interrupt request signal and transmission enable interrupt request signal follow in this order.
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The following three interrupt request signals are generated from UARTAn.
• Reception error interrupt request signal (INTUAnRE)
• Reception end interrupt request signal (INTUAnR)
• Transmission enable interrupt request signal (INTUAnT)
Among these three interrupt signals, the reception error interrupt signal has the highest default priority, and the
(1) Reception error interrupt request signal (INTUAnRE)
(2) Reception end interrupt request signal (INTUAnR)
(3) Transmission enable interrupt request signal (INTUAnT)
A reception error interrupt request signal is generated while reception is enabled by ORing the three types of
reception errors (parity error, framing error, and overrun error) explained in the UAnSTR register section.
A reception end interrupt request signal is output when data is shifted into the UARTAn receive shift register
and transferred to the UAnRX register in the reception enabled status.
No reception end interrupt request signal is generated in the reception disabled status.
If transmit data is transferred from the UAnTX register to the UARTAn transmit shift register with transmission
enabled, the transmission enable interrupt request signal is generated.
CHAPTER 14 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
Table 14-2. Interrupts and Their Default Priorities
Reception error
Reception end
Transmission enable
Interrupt
User’s Manual U16543EJ4V0UD
Priority
High
Low

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