M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 182

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.4
180
(1) TMPn control register 0 (TPnCTL0)
Note The TPnOPT0.TPnOVF bit and 16-bit counter are reset simultaneously.
Cautions 1. Set the TPnCKS2 to TPnCKS0 bits when the TPnCE bit = 0.
Remark
Registers
The TPnCTL0 register is an 8-bit register that controls the operation of TMPn.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
The same value can always be written to the TPnCTL0 register by software.
(TOP00, TOP01, TOP21, and TOP31 (V850E/IA4 only) pins) as the 16-bit counter are reset to the
TPmIOC0 register set status at the same time.
2. Be sure to clear bits 3 to 6 to “0”.
f
XX
V850E/IA3
n = 0 to 3
m = 0, 2
V850E/IA4
n = 0 to 3
m = 0, 2, 3
TPnCTL0
: Peripheral clock
When the value of the TPnCE bit is changed from 0 to 1, the TPnCKS2 to TPnCKS0 bits can
be set simultaneously.
After reset: 00H
TPnCKS2
TPnCE
TPnCE
<7>
0
1
0
0
0
0
1
1
1
1
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
TPnCKS1
TMPn operation disabled (TMPn reset asynchronously
TMPn operation enabled. TMPn operation start
R/W
6
0
0
0
1
1
0
0
1
1
Address: TP0CTL0 FFFFF640H, TP1CTL0 FFFFF660H,
User’s Manual U16543EJ4V0UD
TPnCKS0
5
0
0
1
0
1
0
1
0
1
TP2CTL0 FFFFF680H, TP3CTL0 FFFFF6A0H
f
f
f
f
f
f
f
f
XX
XX
XX
XX
XX
XX
XX
XX
4
0
TMPn operation control
/2
/4
/8
/16
/32
/64
/128
/256
Internal count clock selection
3
0
TPnCKS2 TPnCKS1 TPnCKS0
2
Note
)
1
Moreover, timer outputs
0