M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 308

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

<R>
306
TQ0IOC2
TQnIOC0
(c) TMQn I/O control register 0 (TQnIOC0)
(d) TMQ0 I/O control register 2 (TQ0IOC2)
(e) TMQn counter read buffer register (TQnCNT)
(f) TMQn capture/compare register 0 (TQnCCR0)
Note Enable setting of the TQ0EES1 and TQ0EES0 bits only when timer output (TOQ00 to TOQ03) is
By reading the TQnCNT register, the count value of the 16-bit counter can be read.
If the TQnCCR0 register is set to D
Interval = (D
TQ0OL3
0
0/1
used. In this case, set the TQ0CCR0 to TQ0CCR3 registers to the same value.
Figure 7-9. Register Setting for Interval Timer Mode Operation (2/3)
TQ0OE3 TQ0OL2 TQ0OE2
0
0
+ 1) × Count clock cycle
0/1
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
0
0/1
0
0/1
User’s Manual U16543EJ4V0UD
0
, the interval is as follows.
TQ0EES1
0/1
TQ0OL1
Note
0/1
TQ0EES0 TQ0ETS1 TQ0ETS0
0/1
TQ0OE1 TQnOL0 TQnOE0
Note
0/1
0
0/1
0
0/1
Selection of valid edge
of external event count
input (EVTQ0 pin)
0: Disable TOQn0 pin output
1: Enable TOQn0 pin output
Setting of TOQn0 pin output
level before count operation
0: Low level
1: High level
0: Disable TOQ01 pin output
1: Enable TOQ01 pin output
Setting of TOQ01 pin output
level before count operation
0: Low level
1: High level
0: Disable TOQ02 pin output
1: Enable TOQ02 pin output
0: Disable TOQ03 pin output
1: Enable TOQ03 pin output
Setting of TOQ03 pin output
level before count operation
0: Low level
1: High level
Setting of TOQ02 pin output
level before count operation
0: Low level
1: High level