M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 697

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
17.5 Software Exception
acknowledged.
17.5.1 Operation
routine.
becomes 00000040H, and if the vector is 10H to 1FH, it becomes 00000050H.
A software exception is generated when the CPU executes the TRAP instruction, and can always be
If a software exception occurs, the CPU performs the following processing, and transfers control to the handler
<1> Saves the restored PC to EIPC.
<2> Saves the current PSW to EIPSW.
<3> Writes an exception code to the lower 16 bits (EICC) of ECR (interrupt source).
<4> Sets the PSW.EP and PSW.ID bits (1).
<5> Sets the handler address (00000040H or 00000050H) corresponding to the software exception to the PC,
The processing of a software exception is shown below.
The handler address is determined by the TRAP instruction’s operand (vector). If the vector is 00H to 0FH, it
Note TRAP instruction format: TRAP vector (the vector is a value from 00H to 1FH.)
and transfers control.
CHAPTER 17 INTERRUPT/EXCEPTION PROCESSING FUNCTION
CPU processing
Figure 17-8. Software Exception Processing
User’s Manual U16543EJ4V0UD
EIPC
EIPSW
ECR.EICC
PSW.EP
PSW.ID
PC
Exception processing
TRAP instruction
Restored PC
PSW
Exception code
1
1
Handler address
Note
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