M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 429

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
10.3 Control Registers
(1) TMQn option register 0 (TQnOPT0)
Notes 1. Valid only for TMQ0. Be sure to clear bits 7 to 4 of TMQ1 to 0.
The TQnOPT0 register is an 8-bit register that controls the timer Q option function.
This register can be read or written in 8-bit or 1-bit units. However, the TQnCUF bit is read-only.
Reset sets this register to 00H.
Caution The TQnCMS and TQnCUF bits can be set only in the 6-phase PWM output mode. Be sure to
2. Be sure to clear the TQ0CCS3 to TQ0CCS0 bits to 0 in the 6-phase PWM output mode.
3. In the V850E/IA3, clear bits 2 and 1 of TMQ1 to 0.
4. For details of the TQnOVF bit, see CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ).
TQnOPT0
(n = 0, 1)
clear these bits to 0 when TMQn is used alone (V850E/IA3: n = 0, V850E/IA4: n = 0, 1).
After reset: 00H
TQ0CCS3
TQnCMS
• The TQnCMS bit is valid only when the 6-phase PWM output mode is set (when the
• The TQnCMS bit can be rewritten while the timer is operating (when the
• The following compare registers are rewritten in the batch write mode.
The TQnCUF bit is valid only when the 6-phase PWM output mode is set (when the
TQnCTL1.TQnMD2 to TQnCTL1.TQnMD0 bits = 111).
TQnCTL1.TQnMD2 to TQnCTL1.TQnMD0 bits = 111). Clear the TQnCMS bit to 0
in any other mode.
TQnCTL0.TQnCE bit = 1).
TQnCCR0 to TQnCCR3, TPnCCR0, TPnCCR1, and TQnOPT1 registers
<7>
TQnCUF
0
1
Notes 1, 2
Note 3
0
1
TQ0CCS2
CHAPTER 10 MOTOR CONTROL FUNCTION
Batch write mode (transfer operation)
Anytime write mode
Note 3
R/W
<6>
Notes 1, 2
TQ0CCS1
User’s Manual U16543EJ4V0UD
Timer Qn is counting up.
Timer Qn is counting down.
Address: TQ0OPT0 FFFFF5C5H, TQ1OPT0 FFFFF605H
<5>
Notes 1, 2
Compare register rewrite mode selection
TQ0CCS0
Count-up/count-down flag of timer Qn
<4>
Notes 1, 2
3
0
TQnCMS
<2>
Note 3
TQnCUF
<1>
Note 3
TQnOVF
<0>
Note 4
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