M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 403

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CHAPTER 8 16-BIT 2-PHASE ENCODER INPUT UP/DOWN COUNTER/GENERAL-PURPOSE TIMER (TIMER ENC1n)
(11) Capture/compare register 1n0 (CC1n0)
Note V850E/IA4 only
The CC1n0 register is a 16-bit register. This register can be specified as a capture register or as a compare
register using the CCR1n register.
This register can be read or written in 16-bit units.
Reset sets this register to 0000H.
Cautions 1. When used as a capture register (CCR1n.CMSn0 bit = 0), write access is prohibited.
(a) When set as a capture register
(b) When set as a compare register
When CC1n0 is set as a capture register, the valid edge of the corresponding external interrupt request
signal (TCUD1n) is detected as the capture trigger. TMENC1n latches the count value in synchronization
with the capture trigger (capture operation). The latched value is held in the capture register until the next
capture operation.
The valid edge of external interrupt request signals (rising edge, falling edge, both rising/falling edges) is
selected by the SESA1n register.
When the CC1n0 register is specified as a capture register, interrupt request signals are generated upon
detection of the valid edge of the TCUD1n signal.
Caution The TCUD1n pin is used alternately for the UDC mode and the external capture function.
When the CC1n0 register is set as a compare register, it always compares its own value with the value of
TMENC1n. If the value of the CC1n0 register matches the value of TMENC1n, the CC1n0 register
generates an interrupt request signal (INTCCn0).
V850E/IA3
V850E/IA4
n = 0, 1
2. When used as a compare register (CCR1n.CMSn0 bit = 1) and while TMENC1n is
3. When TMENC1n is stopped (TMC1n.TM1CEn bit = 0), the capture trigger is disabled.
4. When the operation mode is changed from capture register to compare register, set a
5. Continuous reading of the CC1n0 register is prohibited.
CC1n0
n = 0
After reset: 0000H
operating (TMC1n.TM1CEn bit = 1), overwriting the CC1n0 register values is prohibited.
new compare value.
continuously read, the second read value may differ from the actual value. If the CC1n0
register must be read twice, be sure to read another register between the first and the
second read operation.
Therefore, in the UDC mode, the external capture function cannot be used.
15
14
13
R/W
12
User’s Manual U16543EJ4V0UD
Address: CC100 FFFFF586H, CC110 FFFFF5A6H
11
10
9
8
7
6
5
4
3
If the CC1n0 register is
2
Note
1
0
401