M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 594

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
592
(3) UARTAn control register 2 (UAnCTL2)
The UAnCTL2 register is an 8-bit register that selects the baud rate (serial transfer speed) clock of UARTAn.
This register can be read or written in 8-bit units.
Reset sets this register to FFH.
Caution Clear the UAnCTL0.UAnPWR bit to 0 or clear the UAnTXE and UAnRXE bits to 00 before
UAnCTL2
(n = 0, 1)
rewriting the UAnCTL2 register.
After reset: FFH
Remark
CHAPTER 14 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
UAnBRS7
BRS7
UAn
0
0
0
0
1
1
1
1
:
7
BRS6
UAn
UAnBRS6 UAnBRS5 UAnBRS4 UAnBRS3 UAnBRS2 UAnBRS1 UAnBRS0
0
0
0
0
1
1
1
1
f
R/W
:
UCLK
6
: Frequency of base clock selected by the
BRS5
UAn
UAnCTL1.UAnCKS3 to UAnCTL1.UAnCKS0 bits
0
0
0
0
1
1
1
1
:
Address: UA0CTL2 FFFFFA02H, UA1CTL2 FFFFFA12H
User’s Manual U16543EJ4V0UD
BRS4
5
UAn
0
0
0
0
1
1
1
1
:
BRS3
UAn
0
0
0
0
1
1
1
1
4
:
BRS2
UAn
0
1
1
1
1
1
1
1
:
3
BRS1
UAn
×
0
0
1
0
0
1
1
:
2
BRS0
UAn
×
0
1
0
0
1
0
1
:
Default
252
253
254
255
1
(k)
×
4
5
6
:
f
f
f
f
prohibited
UCLK
UCLK
UCLK
UCLK
Serial
f
f
f
Setting
clock
UCLK
UCLK
UCLK
0
:
/252
/253
/254
/255
/4
/5
/6

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