M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 393

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.4 Control Registers
CHAPTER 8 16-BIT 2-PHASE ENCODER INPUT UP/DOWN COUNTER/GENERAL-PURPOSE TIMER (TIMER ENC1n)
(1) Timer unit mode register 1n (TUM1n)
Note V850E/IA4 only
The TUM1n register is an 8-bit register that specifies the TMENC1n operation mode and controls the output
pin operation.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Cautions 1. Changing the value of the TUM1n register during TMENC1n operation (TMC1n.TM1CEn bit
V850E/IA3
V850E/IA4
n = 0, 1
2. When the CMDn bit = 0 (general-purpose timer mode), setting the MSELn bit = 1 (UDC
TUM1n
n = 0
After reset: 00H
= 1) is prohibited.
mode B) is prohibited.
When the CMDn bit = 1 (UDC mode), timer output is not performed regardless of the
setting of the TOEn bit. At this time, timer output is the inverted phase level of the
level set by the ALVT10n bit.
ALVT10n
When the CMDn bit = 1 (UDC mode), timer output is not performed regardless of the
setting of the TOEn bit. At this time, timer output is the inverted phase level of the
level set by the ALVT10n bit.
When UDC mode B is set, the TMC1n.ENMDn, TMC1n.CLRn1, and TMC1n.CLRn0
bits become invalid.
MSELn
CMDn
CMDn
TOEn
0
1
0
1
0
1
0
1
7
General-purpose timer mode (count up)
UDC mode (count up/down)
Timer output disabled
Timer output enabled
Active level is high level
Active level is low level
UDC mode A
UDC mode B
TMENC1n can be cleared by setting the TMC1n.CLRn1 and
TMC1n.CLRn0 bits.
TMENC1n is cleared in the following cases.
R/W
• Upon match with the CM1n0 register during TMENC1n count up
• Upon match with the CM1n1 register during TMENC1n count down
6
0
operation
operation
User’s Manual U16543EJ4V0UD
Specification of operation in UDC mode (count up/down)
Address: TUM10 FFFFF58BH, TUM11 FFFFF5ABH
Specification of timer output (TO1n) active level
5
0
Specification of timer output (TO1n) enable
TMENC1n operation mode specification
4
0
TOEn
3
ALVT10n
2
1
0
MSELn
Note
0
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