M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 155

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

<R>
4.6
change within the noise elimination time are not internally acknowledged.
Reset
On-chip debug
Mode pin
Clock generator (CG)
• Interrupt (INTC)
• High-impedance
• A/D converter (ADC)
Timer ENC (TMENC)
Timer Q (TMQ)
Timer P (TMP)
output control
function of timer for
motor control
A timing controller used to secure the noise elimination time is provided for the following pins. Input signals that
Cautions 1. The maskable interrupt pins are used to release the standby mode.
Notes 1.
Noise Eliminator
Unit
2.
3.
4.
5.
2. The noise filter of the digital delay pin uses clock sampling and therefore cannot
3. The noise eliminator is valid only in the alternate-function mode.
μ
μ
μ
A maskable interrupt input other than INTP6 can be used as the release source of IDLE or STOP
mode.
V850E/IA4 only
Note 4
PD70F3186 (V850E/IA4) only
PD70F3184 (V850E/IA3),
PD703183 (V850E/IA3),
acknowledge an input signal when the peripheral clock (f
RESET
DRST
FLMD0
PLLSIN
INTP0/TOQ0OFF
INTP1
INTP2/TOP2OFF
INTP3/TOP3OFF
INTP4/ADTRG0
INTP5/ADTRG1
INTP7
INTP6
TIUD11
TCUD11
TCLR11
TIUD10
TCUD10
TCLR10
TIQ01
TIQ02
TIQ03
TIQ00
EVTQ0
TRGQ0
TIP20
TIP21
TIP00
TIP01
Note 1
Note 5
Note 2
Note 5
Note 5
Note 5
/TOQ1OFF
/IC1
Target Pin
Note 3
Note 5
μ
Note 5
CHAPTER 4 PORT FUNCTIONS
μ
PD703185 (V850E/IA4),
Table 4-16. Noise Eliminator
PD70F3186 (V850E/IA4) only
User’s Manual U16543EJ4V0UD
Analog
delay
Digital
delay
Delay
Type
μ
PD703186 (V850E/IA4) only
Several 10 ns (TYP.)
About 10 ns (TYP.)
500 ns (MIN.)
4 to 5 clocks
(250 ns (at 64 MHz))
(500 ns (at 64 MHz))
(1
(2
4 to 5 clocks
(125 ns (at 64 MHz))
Noise Elimination
μ
μ
s (at 64 MHz))
s (at 64 MHz))
Width
XX
) is stopped.
f
f
f
f
selectable
f
XX
XX
XX
XX
XX
/4 (62.5 ns (at 64 MHz))
/8 (125 ns (at 64 MHz))
/16 (250 ns (at 64 MHz))
/32 (500 ns (at 64 MHz))
/2 (31.25 ns (at 64 MHz))
Sampling Clock
−
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