M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 275

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(2) Operation timing in pulse width measurement mode
(3) Note
TPkCCR0 register
(a) Clearing overflow flag
If a slow clock is selected as the count clock, FFFFH, not 0000H, may be captured to the TPkCCRa register if
the capture trigger is input immediately after the TPkCTL0.TPkCE bit has been set to 1.
Remark
Sampling clock
TIPk0 pin input
16-bit counter
Count clock
The overflow flag can be cleared to 0 by clearing the TPkOVF bit to 0 with the CLR instruction after
reading the TPkOVF bit when it is 1 and by writing 8-bit data (bit 0 is 0) to the TPkOPT0 register after
reading the TPkOVF bit when it is 1.
TPkCE bit
k = 0, 2
a = 0, 1
FFFFH
0000H
Capture trigger input
0000H
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
FFFFH
User’s Manual U16543EJ4V0UD
Capture trigger input
0002H
273

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